currently https://google.github.io/xls/dslx_std/#cover mentions that:
It desugars into SystemVerilog cover points.
but in practice it seems to emit cover property:
it also mentions that:
Coverpoints can be used to give an indication of code "coverage", i.e., to see what paths of a design are exercised in practice.
we could clarify the current semantic and intented use as what we support is more akin to targeted assertion-based coverage: https://chipverify.com/verification/assertion-coverage rather than fully-instrumented code coverage as describe in: https://chipverify.com/verification/code-coverage
It would also be useful to point to https://github.com/google/xls/issues/2139, https://github.com/google/xls/issues/1126 and https://github.com/google/xls/issues/499 as place where more (and different level of) coverage modes are being discussed